ATTINY1624-SSF Microchip 20MHz 16K SOIC14 and 21 similar items

One new Attiny 1624-SSF 8 bit microcontroller, 20MHz, 16KB Soic14 package 14 pin FEATURES High-performance low-power AVR CPU Running at up to 20MHz Single-cycle I/O access Two-level interrupt controller with vectored interrupts Two-cycle hardware multiplier Supply voltage range: 1.8V to 5.5V Memories 16KB In-System self-programmable Flash memory 2KB SRAM 256B EEPROM 32B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked Write/erase endurance Flash 10,000 cycles EEPROM 100,000 cycles Data retention: 40 years at 55C System Power-on Reset (POR) Brown-out Detection (BOD) Clock options Lockable 20MHz Low-Power internal oscillator 32.768kHz Ultra Low-Power (ULP) internal oscillator 32.768kHz external crystal oscillator External clock input Single-pin Unified Program and Debug Interface (UPDI) Three sleep modes Idle with all peripherals running and immediate wake-up time Standby Configurable operation of selected peripherals SleepWalking peripherals Power-Down with full data retention Temperature Ranges -40C to 85C (standard) -40C to 125C (extended) Speed Grades (-40C to 85C) 0-5MHz @ 1.8V ? 5.5V 0-10MHz @ 2.7V ? 5.5V 0-20MHz @ 4.5V ? 5.5V Speed Grades (-40C to 125C) 0-8MHz @ 2.7V - 5.5V 0-16MHz @ 4.5V - 5.5V Peripherals One 16-bit Timer/Counter type A (TCA) with a dedicated period register and three PWM channels Two 16-bit Timer/Counter type B (TCB) with input capture and simple PWM functionality One 16-bit Real-Time Counter (RTC) running from external 32.768kHz crystal or internal 32.768kHz ULP oscillator Two Universal Synchronous Asynchronous Receiver Transmitter (USART) with fractional baud rate generator, auto-baud, and start-of-frame detection Master/Slave Serial Peripheral Interface (SPI) Master/Slave Two-Wire Interface (TWI) with dual address match Standard mode (Sm, 100kHz) Fast mode (Fm, 400kHz) Fast mode plus (Fm+, 1MHz) Event System for CPU independent and predictable inter-peripheral signaling Configurable Custom Logic (CCL) with four programmable Look-Up Tables (LUT) One Analog Comparator (AC) with scalable reference input One 12-bit differential 375 ksps Analog-to-Digital Converter (ADC) with Programmable Gain Amplifier (PGA) and up to 15 input channels Multiple internal voltage references 1.024V 2.048V 2.500V 4.096V VDD Automated Cyclic Redundancy Check (CRC) flash memory scan Watchdog Timer (WDT) with Window Mode, with a separate on-chip oscillator External interrupt on all general purpose pins I/O and Packages Up to 22 programmable I/O pins 14-pin SOIC150 TSSOP 20-pin SOIC300 SSOP VQFN 3x3mm 24-pin VQFN 4x4mm